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CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION
Material type:
TextLanguage: ENGLISH Publication details: THOMSON LEARNING; 2007Edition: -Description: xvi,411ISBN: - 8131501957
- 621.395
- JOH
| Item type | Current library | Call number | Materials specified | Status | Notes | Date due | Barcode |
|---|---|---|---|---|---|---|---|
| Book | Sri Krishna College of Engineering and Technology RACK 12 / SHELF 89 | 621.395 UYE (Browse shelf(Opens below)) | PAPER PACK | Available | ECE | 37207 | |
| Book | Sri Krishna College of Engineering and Technology RACK 12 / SHELF 76 | 621.395 (Browse shelf(Opens below)) | PAPER PACK | Available | ECE | 34358 |
Browsing Sri Krishna College of Engineering and Technology shelves, Shelving location: RACK 12 / SHELF 89 Close shelf browser (Hides shelf browser)
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| 621.395 SHA VLSI DESIGN | 621.395 SRI STATISTICAL ANALYSIS AND OPTIMIZATION FOR VLSI : TIMING AND POWER | 621.395 UYE INTRODUCTION TO VLSI CIRCUITS AND SYSTEMS | 621.395 UYE CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION | 621.395 UYE INTRODUCTION TO VLSI CIRCUITS AND SYSTEMS | 621.395 VER VLSI DESIGN | 621.395 WES PRINCIPLES OF CMOS VLSI DESIGN: A SYSTEM PERSPECTIVE |
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