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CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION

JOHN P UYEMURA.

CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION - - CENGAGE LEARNING. 2013 - 411 p.

ISBN: 9788131501955

Subjects--Topical Terms:
VLSI DESIGN

Dewey Class. No.: 621.395 UYE / JOH

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CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION